Xilinx Zynq zc706 evaluation board detailed introduction

The core of the Xilinx Zynq zc706 evaluation board is the Zynq-7000 XC7Z045-2FFG900C AP SoC. This XC7Z045 AP SoC is composed of integrated PS and programmable PL. The high-level block diagram is shown below.

We can know from the figure that PS is mainly composed of an APU processor, Interconnect, internal and external memory interface, and IOP. The PS operates independently of the PL and starts when power is applied or restarted.

At present, we only focus on the PS part, so the communication interface for the PL part and how to interact with the PL will not be involved.

Select the zc706 development board under vivado and import the zynq7 chip, double-click to open the chip, and you will see the overall SOC composition diagram:

It can be seen that SOC is composed of PS and PL. Xilinx provides a large number of IP cores for the zynq7000 series and is available for bare metal peripherals and Linux drivers under PS and PL. (Note that the driver here means that the driver for operating the underlying hardware state has been provided, but how to configure/operate peripherals to send and receive data needs to be developed by yourself. Although the sample program is provided in the SDK, it does not cover all use cases .)

The green part in the picture above is configurable, while the gray part is not.

For the arms program of the general development board, that is, when using the common peripherals on the PS side, namely USB and uart, from the above two figures, it can be seen that the transmission and reception of the peripheral and the memory are exchanged by Interconnect, and the IRQ interrupt of the peripheral is connected to APU's GIC (General Interrupt Controller).

zc706 unpacking and development environment construction

• Get the packaging box of zc706, after opening it from the toolbox, you will see the contained components:

• The specific parts of the zc706 evaluation board are described as follows:

After getting the development board, the default DIP switches and jumpers (such as 34 and 29) on the development board are all configured. Basic experimental operations can be performed according to the default configuration.

Start the Linux experiment from the SD card:

• Insert the configured SD card into the SD card slot at position 5.

• First, turn the power switch at position 27 to the upper part in the off state, and connect one end of the power cord to the power slot at position 38.

• Connect the USB end of the USB mini cable to the computer and the mini end to the USB-UART port at position 17.

• Install the serial port assistant (such as friendly serial port assistant or xshell, etc.).

• Turn on the power switch. At this time, you will see the serial port of CP210x in My Computer->Management->Device Manager of the computer. The serial port is unavailable at the first startup. At this time, download the cp210x driver and install it.

• Set the 5 DIP switches at 29 according to the way of 00110 (that is, when the development board is placed as shown in the figure above, position 125 is below and position 34 is above).

• Use xshell to create serial port COM4, and set the properties as follows:

• Switch the zc706 power switch on and off again. The Linux boot process will appear as follows:

• At this point, the login name and password are both roots. After typing them, they can be used as a Linux system. So far, the out-of-the-box inspection of the development board, the booting of Linux from the SD card, and the construction of the basic hardware environment are completed.

zc706 basic peripherals and USB DEVICE mode test process

• When configuring the serial port, you can set it according to the serial port in the first content. You don't need to do the setting here, just go to the next step.

• Note that during the BIST test, the 5 switches should be set to 00010 modes; during the USB test, the 5 switches should be set to 00000 modes.

• Note that when doing this experiment, you need to connect the USB-JTAG cable to the development board. And at the beginning of the document, it is aimed at vivado 2015.4, and my version is vivado 2017.4, although the version in zc706_bist.bat and zc706_usb.bat under C:\zc706_bist\ready_for_download is not modified, it can be run, But will prompt a question under DOS:

• Therefore, here, the 2015.4 of these two files are uniformly revised to 2017.4 (that is, the version number of the vivado installed by yourself).

• According to the above precautions and document description, configure the hardware connection, turn on the power, and open the configured UART assistant to run under DOS:

1. Run zc706_bist.bat, wait for the DOS prompt "Please press any key to continue", you will see the following interface under the serial port assistant:

   

2. At this point, you can perform the test by the XTP242 steps under the serial port assistant.

3. The USB 1M flash drive test process can follow the XTP242 process.

zc706 SDK USB DEVICE mode test process

Note: This document records the DEVICE mode of USB testing under the SDK, which is an example of simulating zc706 as a 1M USB flash drive on a computer.

Vivado builds the basic hardware environment:

proceed to the basic board configuration wizard process:

• Open vivado, click Create Project, and then click Next in the interface that appears:

• In this interface, set the project name such as basics test, and the rest of the default configuration, click Next:

• This step can follow the default configuration, click Next:

• Then select the model that matches your development board in this interface, select Boards, and then type 706 in Search, press Enter, you can see the zc706 board as shown in the figure, and then click Next:

• You will see the final board overview, just click Finish.

Then, after completing the above steps, you will enter the specific board configuration interface for hardware construction and synthesis, bitstream generation, and export to SDK process:

• After the interface after step 5 above, click the Create Block Design option under IP INTEGRATOR in the Flow Navigator on the left. At this time, the designated name interface will appear. Type the name in the Design name, fill in usb_device_design_1 here, and click OK, and it will appear Diagram workspace on the right:

• Click the + sign in the Diagram work area, type zynq in the Search that appears, press Enter, and the zynq7 IP module will appear. Double-click to add the module to the work area:

• After importing into the workspace, click Run Block Automation above, and click OK directly according to the default configuration.

• Then place the mouse on the M_AXI_GP0_ACLK position, connect the interface to FCLK_CLK0, and then right-click to select Validate Design to verify, and a successful verification prompt will appear. Then Ctrl+s to save.

• Right-click the main file under Sources as shown in the figure, then click Generate Output Products, and then click Generate in the default configuration in the figure that appears. After the Output Products are completed, click OK.

• In the same position in the above figure, right-click Create HDL Wrapper, and then select OK for the default configuration.

• Click the Generate Bitstream option under PROGRAM AND DEBUG in the Flow Navigator on the left, click OK to enter the Launch Runs interface, and then the default configuration, click OK to enter the bitstream generation process. After completion, the completion interface will be displayed, click OK by default.

• After completing the above steps, click the File->Export->ExportHardware option, select the Include bitstream option in the interface that appears, and click OK as shown in the figure below. After completion, continue to click the File->Launch SDK option. In the interface that appears, click OK by default to open the SDK and enter the SDK development software interface.

SDK software development process:

After entering the SDK, complete the USB DEVICE software test through the following steps:

1. On the SDK interface, click the File->New->Application Project option, fill in the project name basics test, and then click Next:

2. Since we want to import the USB DEVICE mode example that comes with the SDK, select it as shown in the figure on this interface, and click Finish.

3. After completion, you can see that there are more source code and BSP folders under Project Explorer. Click import in the place shown in the figure to open the import file interface.

4. In the opened interface, select General->File System, click Next, then click Browse, browse to the required USB folder, click Finish, and import the file.

5. After the import is successful, you will see the source file in the navigation bar:

6. According to the previous articles, connect the power cord, USB-JTAG line, and USB-UART serial line of the zc706 development board, and turn the 5 startup mode dial switches to 00000 modes. Then turn on the power. After that, click the Program FPGA option under Xilinx in the title bar of the SDK,

Click the Program option according to the default configuration and wait for the FPGA download to complete.

7. After the download is complete, click the location shown in the figure to download the program to the zc706 development board.

8. After the download is complete, we connect the USB end of the USB-OTG cable to the computer, and connect the Micro end to the USB-OTG interface of zc706, and a formatting USB disk prompt will appear on the computer interface. At this time, we follow the USB DEVICE test in the second part, after formatting u disk, you will see a 1M u disk under the computer drive interface.

9. At this time, the USB DEVICE mode of the bare metal program under our SDK is debugged.

Note: If you want to see the print information of USB DEVICE mode, add #define CH9_DEBUG to line 68 of xusbps_ch9.c of the SDK.

That’s all about the Xilinx Zynq zc706 evaluation board. Are you interested in learning about other kits? Please click

ZCU111 evaluation kit and ZCU102 evaluation kit. If you have any questions, you can post in the forums on the website.